What is a Jazz/Cadence PDK?
A Jazz/Cadence Process Design Kit (PDK) contains all the Jazz-provided process models and process data in the appropriate Cadence technology file formats to enable fast and silicon-accurate IC design in the Cadence® Virtuoso® custom design platform.

These PDKs contain the most accurate process data available for Jazz's comprehensive semiconductor manufacturing technologies. Automated methods and a well-established quality program assure that highest-level standards are met before each PDK is made available to customers, streamlining the design process and enabling the realization of their high-performance products.

How are Jazz/Cadence PDKs used?
Jazz/Cadence PDKs drive silicon accuracy across various design tasks in the Virtuoso platform. These tasks, including Multi-mode Simulation, Accelerated Layout and Silicon Analysis, derive their bottom-up, silicon accuracy directly from the PDK and form the basis of the bottom-up flow in the advanced custom design methodology's "Meet-in-the-Middle" approach.

The Cadence Virtuoso custom design platform
derives its silicon accuracy directly from Jazz/Cadence PDKs

What is in a Jazz/Cadence PDK?
The PDK contains information specific to each design task and to specific design tools.

This is how a Jazz/Cadence PDK data maps
to the design tasks of the Cadence Virtuoso platform

Advanced Device Modeling and Front-End Design
In order to provide the fastest, most silicon-accurate design capability, the latest device and interconnect models must be made available to the designer. This data is derived using the Virtuoso Advanced Device Modeling tools. These tools perform extraction, optimization and verification of device and interconnect models.

The front-end design section of a Jazz/Cadence PDK also contains information that allows designers to drive the Virtuoso Specification-driven Environment and Multi-mode Simulation. From schematic symbols (with CDFs and callbacks) to device simulation models, the Jazz/Cadence PDK ensures that designers can get started quickly and not worry about missing design data.

Back-End Design and Accelerated Layout
Jazz/Cadence PDKs contain the data necessary to drive back-end design tasks using the Virtuoso Accelerated Layout capabilities. The PDKs contain Pcells and layouts for a variety of components, and this data is matched to both the front-end design data as well as the physical verification design tasks of the Virtuoso platform.

Physical Verification and Silicon Analysis
The PDK physical verification section includes Assura™ DRC/LVS and leading-edge 3D device-level parasitic extraction from Assura RCX. Rule decks for DRC and LVS are developed collaboratively with Jazz and are fully qualified for analog and mixed-signal/RF design flow with the widely used Virtuoso platform, providing a seamless front-to-back design solution customers can rely on. The heart of the physical verification section is Assura RCX, which is a comprehensive parasitic RLCK extraction solution for analog and mixed-signal/RF design. Assura RCX provides the foundation for silicon-accurate simulation and analysis, allowing designers to optimize layouts interactively to increase chip performance and silicon yield.

Elements of Jazz's PDK
All Components provided in Jazz´s 0.35µm, 0.25µm, 0.18µm, and 0.13µm Process Technologies. Supports Cadence Design Environment.

The Jazz PDK Process Coverage Chart

The following PDKs are available today from Jazz/Cadence
Process - SiGe60 - 0.35µm
Design Kit - SBC35x
Process - SiGe90 - 0.25/0.18µm
Design Kit - SBC18d and SBC18w
Process - SiGe90 - 0.25/0.18µm
Design Kit - SBC18pt
Process - SiGe120 - 0.18µm
Design Kit - SBC18
Process - CA18 - 0.18µm
Design Kit - CG18A and CA18
Process - CA13 - 0.13µm
Design Kit - CA13
Process - SBL13 - 0.13µm
Design Kit - SBL13

For information on obtaining a Jazz/Cadence PDK, you may contact jazzsemi.com

NOTE: Some EDA tools are not supported in some Jazz Semiconductor process nodes.


Please visit cadence.com for complete information

Learn more about Jazz/Cadence PDKs and offerings
PDK Datasheet (PDF 160KB)
Jazz RFIC SiP Designs whitepaper (PDF 59KB)

See an interactive demonstration on Cadence PDKs

Cadence White Paper on an Advanced Custom Design Methodology

Cadence White Paper "Right On Time: Requirements for Advanced Custom Design"

Cadence Virtuoso Custom Design Platform