CMOS Image Sensor (CIS)

Our TS11IS hybrid CMOS image sensor (CIS) process offering, a combination of 0.11μm and 0.16μm platform allows customers to design higher resolution high-end sensors with smaller pixels and enhanced performance. The process is targeted for applications in high end photography, machine vision, 3D imaging and security sensors. According to Yole Development, the forecast for high-end CMOS image sensors is expected to be ~$2B in 2015 with a CAGR of 13%.

The new platform ideally serves our customers’ needs for the professional CIS markets, allowing them to create new business opportunities, expand the span of applications accessible for their designs, and enlarge their market share. Based on Tower’s 0.16μm CMOS shrink process, it allows easy re-use of existing customers’ 0.18μm circuit IP which will save them from investing in resources to redesign existing blocks, and increases the probability for first time success. The TS11IS offers improved pixel performance, smaller pixel pitch, higher resolution, improved sensitivity, and improved angular response. It allows up to 50% reduction of pixel size, mainly for high-end global shutter pixels.

The platform includes a new local interconnect layer to allow denser metallization routing in pixels while maintaining good QE (quantum efficiency). It also includes tighter design rules for all metal layers and implant layers as well as provides a “Bathtub” option for lower stack height, improving the sensors’ angular response.